CPSC 418: Solution 9
Postscript source for figures
Problem 1
(Part 1a)
1000 : SUBx R1, R2, R3 ; A-B=F
1001 : ADDx R2, R3, R1 ; B+F=G
1002 : ANDx R1, R4, R5 ; G&D=H
1003 : XORx R2, R4, R5 ; B^D=I
Hazards:
- RAW on R3 between lines 1000 and 1001
- WAR on R1 between lines 1000 and 1001
- RAW on R1 between lines 1001 and 1002
- WAW on R5 between lines 1002 and 1003
(Part 1b)
See postscript source above.
(Part 1c)
See postscript source above.
Problem 2
(Part 2a)
1001 : DIVx R1, R2, R3 ; A/B=F
1002 : DIVx R4, R2, R1 ; D/B=G
1003 : SUBx R1, R4, R3 ; F-D=H
1004 : ADDx R4, R3, R4 ; D+G=I
Hazards:
- WAR on R1 between lines 1001 and 1002
- WAW on R3 between lines 1001 and 1003
- RAW on R3 between lines 1001 and 1004
- RAW on R1 between lines 1002 and 1003
- WAR on R4 between lines 1002 and 1004
- WAR on R4 between lines 1003 and 1004
- RAW on R3 between lines 1003 and 1004
(Part 2b)
Performance gains for adding bypass after divide would not be very significant, because there are not very many divide instructions
in most programs. If this were not the case, then with the bypass stage, performance would increase as DIV would require one less cycle.
The cost would be extra hardware for signal lines, multiplexer on input to EX stage, and control logic
in Fetch Operands. The multiplexer would likely increase the cycle time.
(Part 2c)
See postscript source above.
Last modified: 25 March 96
