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R0 I1 F0 F1 &R1 I2 copy &R2 AI &R3 AF copy &R4 S &R0 RNote: & = pass address of parameter
Pseudocode: Code: R7 && 3 -> R8 LANDx R7, 3, R8 R10 && 3 -> R11 LANDx R10, 3, R11 R8 = R11 SUBc R8, R11, NUL JUMP_Z (RA) JUMP_Z _back ;check if byte indices are the same R7 >> 2 -> R7 SHIFTux -2(NULL), R7, R7 R10 >> 2 -> R10 SHIFTux -2(NULL), R10, R10 R6 + R7 -> R7 ADDx R6, R7, R7 R9 + R10 -> R10 ADDx R9, R10, R10 R7 = R10 SUBc R7, R11, NUL Return _back: ;rest of program
PC = R31 | ISA | If the PC were R3, programs would break |
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SP = R30 | ISA | F&R save R30 in hardware when an interrupt occurs (Fig 2.14), because different interrupt levels use different stacks. This is ISA type behaviour, in that programs can assume that R30 will be saved by hardware and so do not need to save it themselves. |
RA = R29 | Compiler | The use of R29 as the return address is just a convention, hardware does not need to treat R29 any differently than any other register. So, one compiler could always put the return address in R29 and another could put it in another register. However, programs compiled with these different compilers could not call each other. So, one might argue that the most correct definition is that the operating system defines RA = 29. |
Time -----> IL2 T________ IL1 T_______| |________ I________ IL0 _______________| R |__| |_____________________ P2 MEM IL1 R KBD R MEM P1 Call ^C INT RFI JMP (100) (150) (200) (250) (300)(310) (410) (460) (560) T: Trap R: Return from Trap I: Interrupt JMP(RA) can also simply be a RETURN
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